1. Technical Field
Embodiments of the present invention generally relate to an integrated circuit, and more particularly to a semiconductor apparatus having stacked semiconductor chips with multiple channels.
2. Related Art
To provide highly integrated semiconductor apparatus, manufacturers in the semiconductor industry have continually increased packaging density, which has led to the development of three-dimensional (“3D”) semiconductor apparatus. A 3D semiconductor apparatus may include a plurality of chips stacked and packaged in a single package. The 3D semiconductor apparatus achieves the creation of smaller and high-capacity memory modules by vertically stacking two or more semiconductor chips.
The 3D semiconductor apparatus may be manufactured by stacking semiconductor chips and interconnecting them so that they behave as a single semiconductor apparatus.
The vertically-stacked semiconductor chips may be coupled to each other using through-silicon via (“TSV”), which may be formed by penetrating the stacked semiconductor chips. A semiconductor apparatus having the TSV may reduce the package size of the semiconductor apparatus as compared to a wire bonding.
Each of the stacked semiconductor chips operates independent of one another and has channels to receive control signals or data.